In stepper motors, motor position is controlled by regulating electrical current in each motor winding. Different stepper motor designs may have different numbers of windings, with the current waveform in each winding leading or lagging current waveforms associated with the other windings. For purposes of this disclosure, current regulation in a single winding is referred to as an example of the current regulation in each winding.
The current waveform in a given motor winding is, in many modern implementations, shaped by an output of a digital-to-analog converter (DAC). As is well-known in the art, a DAC output waveform, when viewed with sufficient magnification, is formed in a stair-stepped shape. For each digital input code (“DAC code”), an ideal DAC maintains a corresponding analog output voltage level. For example, a series of adjacent input codes (e.g., 00000000, 00000001, 00000010, and 00000011 in the case of binary input codes) applied sequentially at a DAC input results in a stair-stepped output waveform shape with each step up of equivalent magnitude to the previous step up.
In the case of a stepper motor, each DAC input code results in a different mechanical rotational position of the stepper motor rotor. As such, any particular section of the waveform is stair-stepped upward for increasing currents and stair-stepped downward for decreasing currents. Micro-stepping resolution, the number of steps in an electrical 360 degree revolution, is limited by the accuracy with which each motor winding current level can be regulated during the constant current portion of each step. That is, once a DAC input code is applied and the winding current reaches a level corresponding to the top of the DAC step up or to the bottom of the DAC step down, that level of winding current is regulated to avoid any further mechanical rotation or vibration of the rotor until a different DAC input code is applied. Absent such regulation, factors such as supply voltage variations and changes in mechanical loads on the stepper motor may cause winding current to vary during the duration of the desired step.
Like many methods of electrical voltage and current regulation, stepper motor winding current regulation may be hysteresis-based. That is, the regulation method may allow the winding current to ramp up to a set-point level corresponding to an applied DAC code. The set-point level of winding current is referred to herein as “ITRIP.” When a forward voltage is applied across the winding, winding current ramps up during a period referred to herein as the “t_ON” period. When the winding current reaches ITRIP, the regulation mechanism then either disallows active drive to the winding or reverses voltage polarity across the winding during a period referred to herein as the “t_OFF” period. During a first portion or all of the t_OFF period referred to herein as the “decay” period, the winding current ramps down toward zero. If the negatively-sloped winding current reaches zero, the regulation mechanism may maintain the winding current at zero for the duration of the t_OFF period until allowing another ramp up to ITRIP. The sum of the t_ON period and the t_OFF period is referred to herein as a PWM cycle.
It is noted that multiple PWM cycles may occur over the duration of any step associated with a given DAC input code. For example, a stepper motor controlling vertical paper positioning in an inkjet printer may move to a particular position and remain at that position for hundreds of milliseconds while the inkjet head moves across the sheet of paper horizontally or even for several seconds to allow ink to dry on the sheet of paper before ejecting the sheet. Several or many PWM current regulation cycles may occur during these periods while the same DAC input code is applied to or latched into the vertical positioning stepper motor to create a corresponding DAC analog output level.
FIG. 1 is a prior-art schematic diagram of a typical “H-bridge” switching apparatus 100 used to regulate stepper motor current. Four switches S1-S4 are sequenced by current regulation logic (not shown) to control current through the winding 110. The current paths 115, 120, and 125 and corresponding directions are indicated by the dashed lines. Feedback to the current regulation logic is provided by a voltage drop across a sense resistor 130 corresponding to current flowing along the paths 115 and 120.
FIG. 2 is a series of prior-art waveform diagrams illustrating various modes of operation of the H-bridge 100 associated with known methods of stepper motor current regulation. The graphs of FIG. 2 illustrate two decay modes implemented by various current regulation logic circuits in conjunction with the H-bridge 100. Each decay mode controls the rate of decay of the current waveform through the stepper motor winding as further described below. The top graph 210 illustrates a slow decay mode and the bottom graph 212 illustrates a fast decay mode. The motor winding current decay rate is controlled in an effort to control jitter in the overall current waveform, particularly at waveform peaks where the slope of the current waveform changes direction and at zero cross-over points where the waveform changes polarity.
Considering now FIG. 2 in light of FIG. 1, the regulation logic turns switches S1 and S2 to a conductive state to ramp up current along the path 115. Current flows along the path 115 through the winding 110 and through the sense resistor 130 during the t_ON period 215. This is shown in the ramp-up portion 217 of the graphs 210 and 212 of FIG. 2. A parasitic LC tank circuit 112 is formed by circuit traces and terminals associated with connection of the sense resistor 130 to the H-bridge 100. The surge of drive current along the path 115 creates an oscillatory voltage waveform in the parasitic tank circuit 112. The oscillatory voltage is approximately equal to (L*di/dt) and can reach a magnitude of several volts at large step-current portions of the winding current waveform before settling.
The oscillatory voltage waveform appears across the sense resistor 130 and is sensed by current regulation logic (not shown) as a large magnitude of noise imposed on the winding current magnitude feedback signal. Feedback from the sense resistor 130 may be ignored by the regulation logic during a fixed blanking period tBLANK 218 in order to avoid the erratic feedback caused by abrupt current changes in the winding 110 at the start of t_ON 215. The settling time of the oscillatory noise signal is proportional to the product of the parasitic inductance L and di/dt. Accordingly, tBLANK 218 is fixed with a sufficiently long period to avoid erratic feedback to the current regulation logic at a current step level associated with the peak of the motor winding current waveform.
Current ramp-up 217 may overshoot the ITRIP setpoint 219 associated with step current levels lower than the peak current. Overshoot occurs because motor winding current feedback information is being ignored during the period tBLANK 218 and the ramp-up 217 is thus unregulated and continues uncontrolled until the expiration of tBLANK 218. Such overshoot may result in larger-magnitude ripple as di/dt increases for higher-magnitude motor currents and as the magnitude of the current waveform increases toward peak or decreases from peak. The overshoot may represent a greater percentage of the t_ON time 215 as ITRIP regulation levels decrease for smaller winding current waveform steps. The latter problem may lead to zero-crossing distortion of the motor winding current waveform as the average level of winding current is regulated across multiple PWM cycles more as a function of the period tBLANK 218 than of the waveform DAC code selected ITRIP setpoint. Zero-crossing distortion causes the average level of winding current to be higher than ITRIP for positive motor winding current waveform excursions and lower than ITRIP for negative motor winding current waveform excursions. This problem may impose a lower limit on the magnitude of current that may be finely regulated and thus on the driver DAC step size and resolution.
The decay portion 220 of the slow decay waveform 210 corresponds to the current path 125 of FIG. 1, implemented by enabling switches S2 and S3 to a conductive state and disabling switches S1 and S4 of the H-bridge 100. Disabling switches S1 and S4 prevents motor drive voltage VM from being applied across the motor winding 110. Enabling switches S2 and S3 allows current flowing through the motor winding 110 to slowly dissipate through internal resistance associated with the current path 125, resulting in the slow decay current waveform 220. It is noted that current along the slow decay path 125 does not flow through either the sense resistor 130 or the parasitic LC tank circuit 112. Thus, current is not sensed in slow decay mode and no TBLANK period is necessary to avoid erratic feedback.
A potential problem exists with slow decay mode, particularly for smaller regulated currents. Energy stored in the inductance of the motor winding 110 may not dissipate completely and take the slow decay current waveform 220 to a sufficiently low level by the end of the t_OFF period and prior to the start of the next PWM cycle. This problem may impose a lower limit on the magnitude of current that may be finely regulated and thus on the driver DAC step size and resolution.
The decay portion 230 of the fast decay waveform 212 corresponds to the current path 120 of FIG. 1, implemented by enabling switches S3 and S4 to a conductive state and disabling switches S1 and S2 of the H-bridge 100. The latter configuration of switches reverses the polarity of voltage applied across the motor winding 110, causing the decay portion 230 of the fast decay current waveform 212 to rapidly decrease to zero. It is noted that the discharge rate di/dt of the motor winding 110 during the decay period associated with the decay waveform 230 is approximately equal to the charge rate associated with the t_ON period 215. And, the di/dt current path 120 includes the sense resistor 130 and the parasitic tank oscillator circuit 112. Therefor, the same problems as discussed above for the drive current phase through the path 115 may apply during the fast decay portion 230 of the waveform 212.